Many of today's communications and radar systems call for RF synthesizer performance, which often is difficult to implement using direct frequency multiplication, phase-locked-loop (PLL) or direct digital synthesizer (DDS) alone. To achieve a desired frequency range, a high frequency output, a fine tuning resolution, a fast settling time, and a low phase noise, system designers often combine PLL and DDS technologies. The strengths of one technology join with the strengths of the other technology to extend the possible range of performance.
DDS provides advantages that are difficult or expensive to achieve using other frequency synthesis systems. These advantages include fast switching (typically sub-microsecond), which is important in spread-spectrum or frequency-hopping systems, including radar and communication systems. Similar systems typically cannot change frequencies as rapidly as a DDS. Additional advantages of a DDS system include fine tuning steps, excellent phase noise, transient-free (phase continuous) frequency changes, flexibility as a modulator, and small size, among others.
There are some disadvantages to common DDS systems, however, imposing some restrictions on the designer. A DDS system covers an operating range limited by the Shannon, Nyquist sampling theory. The output is typically limited to about 45% of the maximum clock rate at which the logic can be operated. The broadest bandwidth DDS system typically has been clocked at somewhat over 1 GHz, with an output bandwidth of about 450 MHz. Another limitation is spectral purity, which is governed by the density/complexity of the logic circuitry that is attainable at the desired operating speed. Spectral purity and operating bandwidth are typically inversely correlated. Despite these limitations, DDS is an important tool in many applications, and some of its functional capabilities are not attainable with most other signal generation techniques.
There are many variations of a conventional DDS system, one example being shown in FIG. 1 at 20. A conventional DDS system 20 typically includes a phase accumulator 22, a mapping circuit 24, and a digital-to-analog (D/A) converter 26. The signal after D/A conversion is typically filtered within a filtering circuit 28 and output. Frequency control is applied to the phase accumulator 22, and a clock signal applied to the phase accumulator 22, mapping circuit 24 and D/A converter 26. The mapping circuit 24 includes a sine map and can be formed in Random Access or Read only memory. A representation of the processed signal is shown below each functional component 22, 24, 26 and 28.
The ability to produce efficiently and economically fine frequency steps enables the DDS to replace multiple loops in many PLL designs. The resulting PLL and DDS architecture covers its range in fine steps, while retaining reasonable division ratios, thus preserving phase noise. In some cases, designers do not accept the cost and complexity of multiple loop synthesizers when similar performance can be achieved by adding a DDS.
There are several fundamental techniques by which a DDS can be combined with a PLL. In simple applications where only multiplication is sought (and spectral purity is not critical), the output of the DDS can be injected directly into a phase comparator. When spectral purity is important, however, a combining loop can be added. Even when using two loops, the resulting circuitry is typically less complex than would be required in a conventional system using only a PLL circuit if the same combination of phase noise and step size is required.
Some DDS systems use up-conversion circuits, which integrate a mix/filter/divide (direct-analog) synthesizer circuit, for example, as shown in FIG. 2 at 30. This type of system often permits 60-70% of the output from the DDS to be translated to a new frequency range. A filter is often added to determine its limit. Usually two sidebands must be sufficiently distant to permit the filter to select a sideband. The circuit 30 as illustrated, includes a mixer 32 and filter 34 as operative with other components in a divide circuit function.
DDS synthesizers as described have been used in many applications, including radios, instrumentation, and radar systems. Though large and unpredictable spurious emissions or responses, also referred to as spurs, have troubled some prior art designs, recent innovations have improved DDS performance, and typically, worst-case spurs are made smaller and more predictable.
Even with recent technological improvements in DDS systems, there are typically four principal spur sources: 1) the reference clock, 2) truncation in the phase accumulator, 3) angle-to-amplitude mapping errors, and 4) DAC error terms, including non-linearities and quantization noise. Spurs can sometimes be created by other source but these four sources are often more problematic. In narrow tuning applications, however, the spur frequencies' predictability allows a designer to develop an effective frequency plan. In wide tuning applications, however, it is difficult to devise a frequency plan that avoids spurs.